1. Technical Field of the Invention
This invention relates generally to electrostatic discharge (ESD) protection and more particularly to ESD protection within a radio frequency integrated circuits.
2. Description of Related Art
As is known, integrated circuits (IC) provide a high degree of functionality in a very small area. Such functionality may include data storage, data processing, radio reception, radio transmission, et cetera. As is also known, integrated circuits include tens-of-thousands to tens-of-millions of transistors (i.e., gates) to implement the desired function or functions. Needless to say, the size of the transistors is very small. For example, a CMOS transistor has a gate oxide thickness of 100 angstroms or less.
As is further known, due to their extremely small size, the gate oxide of CMOS transistors are susceptible to breakdown from static electricity, which is commonly referred to as electrostatic discharge (ESD). If a transistor of an integrated circuit is damaged from ESD while handling of the circuit, the integrated circuit is unusable.
To reduce the risk of damage due to ESD, integrated circuits include ESD protection circuitry. Such ESD protection circuitry includes using silicon-controlled rectifiers (SCR) to clamp ESD voltages and steer related currents away from sensitive transistors, use ESD implanted transistors, which have a higher breakdown voltage, in input/output circuits, use elongated drain structures and larger drain-to-gate spacing, which increase breakdown voltage, and/or other ESD type protection circuitry. While there are numerous ESD protection circuits, none are optimized (i.e., provides desired ESD protection), limit the amount of circuit elements and/or limit the amount of die area, for radio frequency integrated circuits (RFIC).
Therefore, a need exists for a radio frequency integrated circuit ESD protection circuit.